Sensor seeks to cut wafer cleaning costs

Sensor seeks to cut wafer cleaning costs

PORTLAND, Ore. – Energy efficient semiconductor fabrication techniques have largely eluded designers of wafer cleaning processes, which still depend on open-loop recipes that waste energy and water. By closing the loop with on-wafer sensors, the Semiconductor Research Corp. (SRC, Research Triangle, N.C.) said it has developed a technology that saves as much as 80 percent of the water and energy required by traditional open-loop cleaning.

"Of the expensive, ultra-pure water used in a fab, about 80 percent is used for surface cleaning since every time you do a process you have to clean the wafer afterwards," said University of Arizona Professor Farhang Shadman. "That's because today there is no real-time online monitoring of how clean the surface is, which is becoming increasingly important for very large wafers with very small structures."

The result of an eight-year, SRC-funded development effort is a sensor that determines precisely when a wafer is clean. SRC’s member companies can deploy the sensor to reduce their use of water and energy by integrating the sensor around the edge of each wafer.

SRC has been working on clean wafer fabrication techniques for 16 years at the University of Arizona’s Engineering Research Center for Environmentally Benign Semiconductor Manufacturing, said SRC director Bob Havemann. The sensor-based technique for cleaning wafers “will be especially important for the future as the industry transitions from 300 to 450 millimeter wafers, which are harder to keep clean because of their much larger area."

The cleaning sensor consists of channels fabricated with whatever conductors and insulators are used in each wafer and into which cleaning fluids seep. Channel size is proportional to the smallest design features on a wafer, allowing the sensor to provide an accurate representation of wafer cleaning. Since wafers are cleaned by spraying water on their center while the wafer is spinning, the sensors are located around the edge of the wafer where the last vestiges of impurities are being swept off. By measuring the impedance of the cleaning water in the channels, a real-time readout about remaining impurities is obtained, allowing the cleaning process to be stopped when an acceptable level of cleanliness is achieved.

Environmental Metrology Corp. (Tucson, Ariz.), where Shadman serves as president and CEO, has licensed the cleaning process from SRC and is currently making it available to member companies, including Advanced Micro Devices, Freescale Semiconductor, GlobalFoundries, IBM, Intel and Texas Instruments. EMC supplies a wired test wafer that allows members to determine cleaning process savings. A wireless version available next year will allow the cleaning sensor to be fabricated at the edge of each production wafer, thereby streamlining the cleaning work flow.
TAG:Semiconductor Research Corp Environmental Metrology Corp Wafer Cleaning SRC Wafer Cleaning